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  december 2009 doc id 16903 rev 1 1/30 1 TDA7567PD 4 x 50 w differential quad power amplifier with built-in diagnostics features features multipower bcd technology mosfet output power stage dmos power output differential input new high efficiency (class sb) high output power capability 4x28 w/4 @ 14.4 v, 1 khz, 10% thd, 4x50 w max power max. output power 4x72 w/2 full i 2 c bus driving: ? standby ? independent front/rear soft play/mute ? selectable gain 26 db /16 db (for low noise line output function) ? high efficiency enable/disable ?i 2 c bus digital diagnostics (including dc and ac load detection) operates both in i 2 c and non-i 2 c bus mode two selectable i 2 c bus addresses full fault protection dc offset detection four independent short circuit protection clipping detector pin with selectable threshold (2 %/10 %) standby/mute pin linear thermal shutdown with multiple thermal warning esd protection description the TDA7567PD is a new bcd technology quad bridge power amplifier in powerso36 package specially intended for automotive applications. thanks to the dmos output stage the TDA7567PD has a very low distortion allowing a clear powerful sound. among the features, its superior efficiency performance coming from the internal exclusive structure, makes it the most suitable device to simplify the thermal management in high power sets. the dissipated output power under average listening condition is in fact reduced up to 50 % when compared to the level provided by conventional class ab solutions. this device is equipped with a full diagnostics array that communicates the status of each speaker through the i 2 c bus. the i 2 c bus can be disabled and the device can be controlled by standby/mute pin. powerso36 table 1. device summary order code package packing TDA7567PD powerso36 tube TDA7567PDtr powerso36 tape and reel www.st.com
contents TDA7567PD 2/30 doc id 16903 rev 1 contents 1 block, application and pins connection diagrams . . . . . . . . . . . . . . . . . 6 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 diagnostics functional desc ription . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.1 turn-on diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.2 permanent diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.3 output dc offset detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.4 ac diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4 multiple faults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.1 faults availability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5 thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6 fast muting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7 address selection and i 2 c disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8i 2 c bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.1 i 2 c programming/reading sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.2 i 2 c bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.2.1 data validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.2.2 start and stop conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.2.3 byte format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.2.4 acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 9 software specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 10 examples of bytes sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
TDA7567PD contents doc id 16903 rev 1 3/30 11 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 12 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
list of tables TDA7567PD 4/30 doc id 16903 rev 1 list of tables table 2. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 3. thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 4. electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. double fault table for turn-on diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 6. ib1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 7. ib2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 8. db1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 9. db2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 10. db3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 11. db4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 12. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
TDA7567PD list of figures doc id 16903 rev 1 5/30 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 3. pins connection diagram (top of view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. itu r-arm frequency response, weighting filter for transient pop. . . . . . . . . . . . . . . . . . . 11 figure 5. turn-on diagnostic: working principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 6. svr and output behavior (case 1: without turn-on diagnostic). . . . . . . . . . . . . . . . . . . . . . 12 figure 7. svr and output pin behavior (case 2: with turn-on diagnostic) . . . . . . . . . . . . . . . . . . . . . 13 figure 8. short circuit detection thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 9. load detection thresholds - high gain setting 26 db . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 10. load detection thresholds - low gain setting 16 db . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 11. restart timing without diagnostic enable (permanent) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 12. restart timing with diagnostic enable (permanent). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 13. current detection high: load impedance |z| vs. output peak voltage . . . . . . . . . . . . . . . . . 16 figure 14. current detection low: load impedance |z| vs. output peak voltage . . . . . . . . . . . . . . . . . . 16 figure 15. thermal foldback diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 16. data validity on the i 2 c bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 17. timing diagram on the i 2 c bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 18. acknowledge on the i 2 c bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 19. powerso36 (slug up) mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . 28
block, application and pins connection diagrams TDA7567PD 6/30 doc id 16903 rev 1 1 block, application and pins connection diagrams figure 1. block diagram short circuit protection & diagnostic i2cbus mute1 mute2 thermal protection & dump clip detector in 4 + in 3 + vcc cd out 3+ out 3- out 4+ out 4- out 1+ out 1- out 2+ out 2- short circuit protection & diagnostic short circuit protection & diagnostic short circuit protection & diagnostic 16/26db adsel clk data svr tab sgnd pwgnd st-by/mute 16/26db 16/26db 16/26db in 3 - in 4 - in 1 + in 1 - in 2+ in 2 - adsel/i2cdis
TDA7567PD block, application and pins connection diagrams doc id 16903 rev 1 7/30 figure 2. application diagram figure 3. pins connection diagram (top of view) in 3 + c1 0.22 f out 3 out 4 out 1 out 2 c6 10 f tab 47k - + - + - + - + vcc c8 0.1 f v(4v .. v cc ) c7 3300 f data i2c bus clk 23 30 31 2 7 11 29 sgnd 24 18 cd v 6 12 33 34 35 3 4 8 22 21 20 15 13 10 1 9 adsel/i2cdis vcc vcc vcc 19 36 c2 0.22 f 32 in 3 - in 4 + c3 0.22 f c4 0.22 f in 4 - in 1 + c5 0.22 f c6 0.22 f in 1 - in 2 + c7 0.22 f c8 0.22 f in 2 - 25 26 27 28 s v r s t b y in 3 + c1 0.22 f out 3 out 4 out 1 out 2 c6 10 f tab 47k - + - + - + - + vcc c8 0.1 f v(4v .. v cc ) c7 3300 f data i2c bus clk 23 30 31 2 7 11 29 sgnd 24 18 cd v 6 12 33 34 35 3 4 8 22 21 20 15 13 10 1 9 adsel/i2cdis vcc vcc vcc 19 36 c2 0.22 f 32 in 3 - in 4 + c3 0.22 f c4 0.22 f in 4 - in 1 + c5 0.22 f c6 0.22 f in 1 - in 2 + c7 0.22 f c8 0.22 f in 2 - 25 26 27 28 s v r s t b y cd n.c. n.c. out2+ vcc pwgnd n.c. out4+ ck_he-selector out3- pwgnd out3+ in3+ in3- out1+ pwgnd out1- vcc 18 16 17 15 6 5 4 3 2 21 22 31 32 33 35 34 36 20 1 19 tab vcc d06au1641b adsel/i2cdis data_gain-selecto r out4- in4+ in4- sgnd 9 8 7 28 29 30 out2- in2+ 10 27 n.c. stby vcc in2- in1- in1+ 14 12 11 23 25 26 pwgnd svr 13 24
electrical specifications TDA7567PD 8/30 doc id 16903 rev 1 2 electrical specifications 2.1 absolute maximum ratings 2.2 thermal data 2.3 electrical characteristics refer to the test circuit, v s = 14.4 v; r l = 4 ; f = 1 khz; g v = 26 db; t amb = 25 c; unless otherwise specified. table 2. absolute maximum ratings symbol parameter value unit v op operating supply voltage 18 v v s dc supply voltage 28 v v peak peak supply voltage (for t = 50 ms) 50 v v ck ck pin voltage 6 v v data data pin voltage 6 v i o output peak current (not repetitive t = 100 ms) 8 a i o output peak current (repetitive f > 10 hz) 6 a p tot power dissipation t case = 70 c 85 w t stg , t j storage and junction temperature -55 to 150 c table 3. thermal data symbol parameter value unit r th j-case thermal resistance junc tion-to-case max. 1 c/w table 4. electrical characteristics symbol parameter test condition min. typ. max. unit power amplifier v s supply voltage range - 8 - 18 v i d total quiescent drain current - - 180 300 ma p o output power max power (v s = 15.2 v, square wave input (2 vrms)) -50-w thd = 10 % thd = 1 % 25 20 28 22 - w w r l = 2 ; thd 10 % r l = 2 ; thd 1 % r l = 2 ; max. power - 50 40 75 - w w w
TDA7567PD electrical specifications doc id 16903 rev 1 9/30 thd total harmonic distortion p o = 1 w to 10 w; std mode he mode; p o = 1.5 w he mode; p o = 8 w - 0.03 0.02 0.15 0.1 0.1 0.8 % % % p o = 1-10 w, f = 10 khz - 0.2 0.5 % g v = 16 db; std mode v o = 0.1 to 5 v rms - 0.02 0.05 % c t cross talk f = 1 khz to 10 khz, r g = 600 50 60 - db r in input impedance - 60 100 130 k g v1 voltage gain 1 - 25 26 27 db g v1 voltage gain match 1 - -1 - 1 db g v2 voltage gain 2 - 15 16 17 db g v2 voltage gain match 2 - -1 - 1 db e in1 output noise voltage 1 r g = 600 20 hz to 22 khz - - 100 v e in2 output noise voltage 2 r g = 600 ; g v = 16 db 20 hz to 22 khz - - 30 v svr supply voltage rejection f = 100 hz to 10 khz; v r = 1 vpk; r g = 600 50 60 - db bw power bandwidth - 100 - - khz a sb standby attenuation - 90 110 - db i sb standby current v st-by = 0 - 1 10 a a m mute attenuation - 80 100 - db v os offset voltage mute and play -70 0 70 mv v am min. supply mute threshold - 7 7.5 8 v t on turn on delay d2/d1 (ib1) 0 to 1 - 15 40 ms t off turn off delay d2/d1 (ib1) 1 to 0 - 15 40 ms v sby standby/mute pin for standby - 0 - 1.5 v v mu standby/mute pin for mute - 3.5 - 5 v v op standby/mute pin for operating -7-v s v i mu standby/mute pin current v st-by/mute = 8.5 v - 20 40 a v st-by/mute < 1.5 v - 0 5 a cd lk clip det high leakage current cd off / v cd = 6 v - 0 5 a cd sat clip det sat. voltage cd on; i cd = 1 ma - - 300 mv cd thd clip det thd level d0 (ib1) = 1 5 10 15 % d0 (ib1) = 0 1 2 3.5 % table 4. electrical characteristics (continued) symbol parameter test condition min. typ. max. unit
electrical specifications TDA7567PD 10/30 doc id 16903 rev 1 v os during mute on/off output offset voltage itu r-arm weighted (full wave rectified, standby pin linear transition = 5.55 v to 6.45 v in 80 ms, @25 c, v s = 14.4v) see figure 4 -7.5 - +7.5 mv during standby on/off output offset voltage -7.5 - +7.5 mv ck_he std mode selector adsel pin floating - - 1.5 v he mode selector adsel pin floating 2.3 - v data_gain high gain selector adsel pin floating - 1.5 v low gain selector adsel pin floating 2.3 - - v turn on diagnostics 1 (power amplifier mode) pgnd short to gnd det. (below this limit, the output is considered in short circuit to gnd) power amplifier in standby --1.2v pvs short to v s det. (above this limit, the output is considered in short circuit to v s ) vs -1.2 - - v pnop normal operation thresholds.(within these limits, the output is considered without faults). 1.8 - vs -1.8 v lsc shorted load det. - - 0.5 lop open load det. 85 - lnop normal load det. 1.5 - 45 turn on diagnostics 2 (line driver mode) pgnd short to gnd det. (below this limit, the output is considered in short circuit to gnd) power amplifier in standby - - 1.2 v pvs short to vs det. (above this limit, the output is considered in short circuit to vs) - vs -1.2 - - v pnop normal operation thresholds. (within these limits, the output is considered without faults). - 1.8 - vs -1.8 v lsc shorted load det. - - - 1.5 lop open load det. - 330 - - lnop normal load det. - 7 - 180 permanent diagnostics 2 (power amp lifier mode or line driver mode) pgnd short to gnd det. (below this limit, the output is considered in short circuit to gnd) power amplifier in mute or play, one or more short circuits protection activated --1.2v table 4. electrical characteristics (continued) symbol parameter test condition min. typ. max. unit
TDA7567PD electrical specifications doc id 16903 rev 1 11/30 figure 4. itu r-arm frequency response, weighting filter for transient pop pvs short to vs det. (above this limit, the output is considered in short circuit to vs) power amplifier in mute or play, one or more short circuits protection activated vs -1.2 - - v pnop normal operation thresholds. (within these limits, the output is considered without faults). 1.8 - vs -1.8 v l sc shorted load det. power amplifier mode - - 0.5 line driver mode - - 1.5 v o offset detection power amplifier in play, ac input signals = 0 1.5 2 2.5 v i nlh normal load current detection v o < (v s - 5)pk ib2 (d7) = 0 500 - - ma i nll normal load current detection v o < (v s - 5)pk ib2 (d7) = 1 300 - - ma i olh open load current detection v o < (v s - 5)pk ib2 (d7) = 0 - - 250 ma i oll open load current detection v o < (v s - 5)pk ib2 (d7) =1 - - 125 ma i 2 c bus interface s cl clock frequency - - - 400 khz v il input low voltage - - - 1.5 v v ih input high voltage - 2.3 - - v table 4. electrical characteristics (continued) symbol parameter test condition min. typ. max. unit output attenuation (db) -50 -40 -30 -20 -10 0 10 10 100 1000 10000 100000 hz ac00343
diagnostics functional description TDA7567PD 12/30 doc id 16903 rev 1 3 diagnostics functional description 3.1 turn-on diagnostic it is activated at the turn-on (standby out) under i 2 c bus request. detectable output faults are: short to gnd short to vs short across the speaker open speaker to verify if any of the above misconnections are in place, a subsonic (inaudible) current pulse ( figure 5 ) is internally generated, sent through the speaker(s) and sunk back. the turn-on diagnostic status is internally stored until a successive diagnostic pulse is requested (after a i 2 c reading). if the "standby out" and "diagnostic enable" commands are both given through a single programming step, the pulse takes place firs t (power stage still in standby mode, low, outputs= high impedance). afterwards, when the amplifier is biased, the permanent diagnostic takes place. the previous turn-on state is kept until a short appears at the outputs. figure 5. turn-on diagnostic: working principle figure 6 and 7 show svr and output waveforms at the turn-on (standby out) with and without turn-on diagnostic. figure 6. svr and output behavior (case 1: without turn-on diagnostic) ch- ch+ isource vs~5v isink t (ms) i (ma) isink isource ~100ms measure time bias (power amp turn-on) t diagnostic enable (permanent) permanent diagnostic acquisition time (100ms typ) permanent diagnostics data (output) permitted time i2cb data vsvr out fault event read data
TDA7567PD diagnostics functional description doc id 16903 rev 1 13/30 figure 7. svr and output pin behavior (case 2: with turn-on diagnostic) the information related to the outputs status is read and memorized at the end of the current pulse top. the acquisition time is 100 ms (typ.). no audible noise is generated in the process. as for short to gnd / vs the fault-detection thresholds remain unchanged from 26 db to 16 db gain setting. they are as follows: figure 8. short circuit detection thresholds concerning short across the speaker / open spea ker, the threshold varies from 26 db to 16 db gain setting, since different loads are expected (either normal speaker's impedance or high impedance). the values in case of 26 db gain are as follows: figure 9. load detection thresholds - high gain setting 26 db if the line driver mode (g v = 16 db and line driver mode diagnostic = 1) is selected, the same thresholds will change as follows: figure 10. load detection thresholds - low gain setting 16 db bias (power amp turn-on) permitted time turn-on diagnostic acquisition time (100ms typ) t read data permanent diagnostic acquisition time (100ms typ) permanent diagnostics data (output) permitted time diagnostic enable (turn-on) turn-on diagnostics data (output) permitted time i2cb data vsvr out diagnostic enable (permanent) fault event d01au1253 s.c. to gnd x s.c. to vs 0v 1.8v v s -1.8v v s x normal operation 1.2v v s -1.2v s.c. across load x open load 0v 1.5 45 infinite x normal operation 0.5 85 ac00060 s.c. across load x open load 0 7 180 infinite x normal operation 1.5 330
diagnostics functional description TDA7567PD 14/30 doc id 16903 rev 1 3.2 permanent diagnostics detectable conventional faults are: ? short to gnd ?short to vs ? short across the speaker the following additional features are provided: ? output offset detection the TDA7567PD has 2 operating status: 1. restart mode. the diagnostic is not enabled. each audio channel operates independently from each other. if any of the a.m. faults occurs, only the channel(s) interested is shut down. a check of the output status is made every 1 ms ( figure 11 ). restart takes place when the overload is removed. 2. diagnostic mode. it is enabled via i 2 c bus and self activates if an output overload (such to cause the intervention of the short-circuit protection) occurs to the speakers outputs. once activated, the diagnostics procedure develops as follows ( figure 12 ): ? to avoid momentary re-circulation spikes from giving erroneous diagnostics, a check of the output status is made after 1ms: if normal situation (no overloads) is detected, the diagnostic is not performed and the channel returns back active. ? instead, if an overload is detected during the check after 1 ms, then a diagnostic cycle having a duration of about 100 ms is started. ? after a diagnostic cycle, the audio channel interested by the fault is switched to restart mode. the relevant data are stored inside the device and can be read by the microprocessor. when one cycle has terminated, the next one is activated by an i 2 c reading. this is to ensure continuous diagnostics throughout the car- radio operating time. ? to check the status of the device a sampling system is needed. the timing is chosen at microprocessor level (over half a second is recommended). figure 11. restart timing without diagnostic enable (permanent) - each 1ms time, a sampling of the fault is done figure 12. restart timing with diagnostic enable (permanent) t 1-2ms 1ms 1ms 1ms 1ms overcurrent and short circuit protection intervention (i.e. short circuit to gnd) short circuit removed out t overcurrent and short circuit protection intervention (i.e. short circuit to gnd) short circuit removed 1-2ms 100/200ms 1ms 1ms
TDA7567PD diagnostics functional description doc id 16903 rev 1 15/30 3.3 output dc offset detection any dc output offset exceeding 2 v are signalled out. this inconvenient might occur as a consequence of initially defective or aged and worn-out input capacitors feeding a dc component to the inputs, so putting the speakers at risk of overheating. this diagnostic has to be performed with low-level output ac signal (or v in = 0). the test is run with selectable time duration by microprocessor (from a "start" to a "stop" command): ? start = last reading operation or setting ib1 - d5 - (offset enable) to 1 ? stop = actual reading operation excess offset is signalled out if persistent th roughout the assigned testing time. this feature is disabled if any overloads leading to activati on of the short-circuit protection occurs in the process. 3.4 ac diagnostic it is targeted at detecting accidental disconnection of tweeters in 2-way speaker and, more in general, presence of capacitively (ac) coupled loads. this diagnostic is based on the notion that the overall speaker's impedance (woofer + parallel tweeter) will tend to increase towards high frequen cies if the tweeter gets disconnected, because the remaining speaker (woofer) would be out of its operating range (high impedance). the diagnostic decision is made according to peak output current thresholds, and it is enabled by setting (ib2-d2) = 1. two different detection levels are available: high current threshold ib2 (d7) = 0 ? iout > 500 mapk = normal status ? iout < 300 mapk = open tweeter low current threshold ib2 (d7) = 1 ? iout > 250 mapk = normal status ? iout < 125 mapk = open tweeter to correctly implement this feature, it is nece ssary to briefly provide a signal tone (with the amplifier in "play") whose frequency and magnitude are such to determine an output current higher than 500 mapk with ib2(d7)=0 (higher than 250 mapk with ib2(d7)=1) in normal conditions and lower than 250 mapk with ib2(d7)=0 (lower than 125 mapk with ib2(d7)=1) should the parallel tweeter be missing. the test has to last for a minimum number of 3 sine cycles starting from the activation of the ac diagnostic function ib2) up to the i 2 c reading of the results (measuring period). to confirm presence of tweeter, it is necessary to find at least 3 current pulses over the above thresholds over all the meas uring period, else an "open tweeter" message will be issued. the frequency / magnitude setting of the test tone depends on the impedance characteristics of each specific speaker being used, with or without the tweeter connected (to be calculated case by case). high-frequency tones (> 10 khz) or even ultrasonic signals are recommended for their negligible acoustic impact and also to maximize the impedance module's ratio between with tweeter-on and tweeter-off.
diagnostics functional description TDA7567PD 16/30 doc id 16903 rev 1 figure 13 shows the load impedance as a function of the peak output voltage and the relevant diagnostic fields. this feature is disabled if any overloads leading to activation of the short-circuit protection occurs in the process. figure 13. current detection high: load impedance |z| vs. output peak voltage figure 14. current detection low: load impedance |z| vs. output peak voltage 12345678 1 2 3 5 10 20 30 50 vout (peak) load |z| (ohm) iout (peak) <250ma iout (peak) >500ma low current detection area (open load) d5 = 1 of the dbx byres high current detection area (normal load) d5 = 0 of the dbx bytes ib2(d7) = 0 0.5 1 1.5 2 2.5 3 3.5 4 1 2 3 5 10 20 30 50 vout (peak) load |z| (ohm) iout (peak) <125ma iout (peak) >250ma low current detection area (open load) d5 = 1 of the dbx byres high current detection area (normal load) d5 = 0 of the dbx bytes ib2(d7) = 1
TDA7567PD multiple faults doc id 16903 rev 1 17/30 4 multiple faults when more misconnections are simultaneously in place at the audio outputs, it is guaranteed that at least one of them is initially read out. the others are notified after successive cycles of i 2 c reading and faults removal, provided that the diagnostic is enabled. this is true for both kinds of diagnostic (turn-on and permanent). the table below shows all the couples of double-fault possible. it should be taken into account that a short circuit with the 4 ohm speaker unconnected is considered as double fault. s. gnd (so) / s. gnd (sk) in the above table make a distinction according to which of the 2 outputs is shorted to ground (test-current source side= so, test-current sink side = sk). more precisely, in channels ch3 and ch2, so = ch +, sk = ch-; in channels ch4 and ch1, so = ch-, sk = ch+. in permanent diagnostic the table is the same, with only a difference concerning open load(*), which is not among the recognizable faults. should an open load be present during the device's normal working, it would be detected at a subsequent turn on diagnostic cycle (i.e. at the successive car radio turn on). 4.1 faults availability all the results coming from i 2 cb us, by read operations, are the consequence of measurements inside a defined period of time. if the fault is stable throughout the whole period, it will be sent out. to guarantee always resident functions, every kind of diagnostic cycles (turn on, permanent, offset) will be reactivate after any i 2 c reading operation. so, when the micro reads the i 2 c, a new cycle will be able to start, but the read data will come from the previous diag. cycle (i.e. the device is in turn-on state, with a short to gnd, then the short is removed and micro reads i 2 c. the short to gnd is still present in by tes, because it is the result of the previous cycle. if another i 2 c reading operation occurs, the bytes do not show the short). in general to observe a change in diagnostic bytes, two i 2 c reading operations are necessary. table 5. double fault table for turn-on diagnostic s. gnd (so) s. gnd (sk) s. vs s. across l. open l. s. gnd (so) s. gnd s. gnd s. vs + s. gnd s. gnd s. gnd s. gnd (sk) / s. gnd s. vs s. gnd open l. (*) s. vs / / s. vs s. vs s. vs s. across l. / / / s. across l. n.a. open l. / / / / open l. (*)
thermal protection TDA7567PD 18/30 doc id 16903 rev 1 5 thermal protection thermal protection is implemented through thermal foldback ( figure 15 ). thermal foldback begins limiting the audio input to the amplifier stage as the junction temperatures rise above the normal operating range. this effectively limits the output power capability of the device thus reducing the te mperature to acceptable levels without totally interrupting the operation of the device. the output power will decrease to the point at which ther mal equilibrium is reached. thermal equilibrium will be reached when the reduction in output power reduces the dissipated power such that the die temperature falls below the thermal foldback threshold. should the device cool, the audio level will in crease until a new thermal equilibrium is reached or the amplifier reaches full power. thermal foldback will reduce the audio output level in a linear manner. three thermal warning are available through the i 2 c bus data. figure 15. thermal foldback diagram tj ( c) th. sh. start th. sh. end vout th. warn. on tj ( c) vout tj ( c) > t sd (with same input signal) < t sd cd out
TDA7567PD fast muting doc id 16903 rev 1 19/30 6 fast muting the muting time can be shortened to less than 1.5 ms by setting (ib2) d5 = 1. this option can be useful in transient battery situations (i.e. during car engine cranking) to quickly turnoff the amplifier for avoiding any audible effects caused by noise/transients being injected by preamp stages. the bit must be set back to ?0? shortly after the mute transition.
address selection and i 2 c disable TDA7567PD 20/30 doc id 16903 rev 1 7 address selection and i 2 c disable when the adsel/i2cdis pin is left open the i 2 c bus is disabled and the device can be controlled by the stby/mute pin. in this status (no - i 2 c bus) the ck pin enables the high-efficiency mode (0 = std mode; 1 = he mode) and the data pin sets the gain (0 = 26 db; 1 = 16 db). when the adsel/i2cdis pin is connected to gnd the i 2 c bus is active with address <1101100-1>. to select the other i 2 c address a resistor must be connected to adsel/i2cdis pin as following: 0 ~25k r>60k: legacy mode only (x: read/write bit selector)
TDA7567PD i 2 c bus doc id 16903 rev 1 21/30 8 i 2 c bus 8.1 i 2 c programming/r eading sequences a correct turn on/off sequence respectful of the diagnostic timings and producing no audible noises could be as follows (after battery connection): turn-on: pin2 > 7v --- 10 ms --- (standby out + diag enable) --- 500 ms (min) --- muting out turn-off: muting in --- 20 ms --- (diag disable + standby in) --- 10 ms --- pin2 = 0 car radio installation: pin2 > 7v --- 10ms diag enable (write) --- 200 ms --- i 2 c read (repeat until all faults disappear). offset test: device in play (no si gnal) -- offset enable - 30 ms - i 2 c reading (repeat i 2 c reading until high-offset message disappears). 8.2 i 2 c bus interface data transmission from microprocessor to the TDA7567PD and viceversa takes place through the 2 wires i 2 c bus interface, consisting of the two lines sda and scl (pull-up resistors to positive supply voltage must be connected). 8.2.1 data validity as shown by figure 16 , the data on the sda line must be stable during the high period of the clock. the high and low state of the data line can only change when the clock signal on the scl line is low. 8.2.2 start and stop conditions as shown by figure 17 a start condition is a high to low transition of the sda line while scl is high. the stop condition is a low to high transition of the sda line while scl is high. 8.2.3 byte format every byte transferred to the sda line must contain 8 bits. each byte must be followed by an acknowledge bit. the msb is transferred first.
i 2 c bus TDA7567PD 22/30 doc id 16903 rev 1 8.2.4 acknowledge the transmitter puts a resistive high level on the sda line during the acknowledge clock pulse (see figure 18 ). the receiver the acknowledges has to pull-down (low) the sda line during the acknowledge clock pulse, so that the sda line is stable low during this clock pulse. transmitter : master (p) when it writes an address to the TDA7567PD slave (TDA7567PD) when the p reads a data byte from TDA7567PD receiver: slave (TDA7567PD) when the p writes an address to the TDA7567PD master (p) when it reads a data byte from TDA7567PD figure 16. data validity on the i 2 c bus figure 17. timing diagram on the i 2 c bus figure 18. acknowledge on the i 2 c bus sda scl data line stable, data valid change data allowed d99au1031 scl sda start i 2 cbus stop d99au1032 scl 1 msb 23789 sda start acknowledgment from receiver d99au1033
TDA7567PD software specifications doc id 16903 rev 1 23/30 9 software specifications all the functions of the TDA7567PD are activated by i 2 c interface. the bit 0 of the "address byte" defines if the next bytes are write instruction (from p to TDA7567PD) or read instruction (from TDA7567PD to p). chip address x = 0 write to device x = 1 read from device if r/w = 0, the p sends 2 "instruction bytes": ib1 and ib2. d7 d0 110110 (1) 1. address selector bit, please refer to address selection description on chapter 7 . xd8 hex table 6. ib1 bit instruction decoding bit d7 0 d6 diagnostic enable (d6 = 1) diagnostic defeat (d6 = 0) d5 offset detection enable (d5 = 1) offset detection defeat (d5 = 0) d4 front channel gain = 26 db (d4 = 0) gain = 16 db (d4 = 1) d3 rear channel gain = 26db (d3 = 0) gain = 16db (d3 = 1) d2 mute front channels (d2 = 0) unmute front channels (d2 = 1) d1 mute rear channels (d1 = 0) unmute rear channels (d1 = 1) d0 cd 2% (d0 = 0) cd 10% (d0 = 1) table 7. ib2 bit instruction decoding bit d7 current detection threshold high th (d7 = 0) low th (d7 =1) d6 0
software specifications TDA7567PD 24/30 doc id 16903 rev 1 if r/w = 1, the TDA7567PD sends 4 "diagnosti cs bytes" to p: db1, db2, db3 and db4. d5 normal muting time (d5 = 0) fast muting time (d5 = 1) d4 standby on - amplifier not working - (d4 = 0) standby off - amplifier working - (d4 = 1) d3 power amplifier mode diagnostic (d3 = 0) line driver mode diagnostic (d3 = 1) d2 current detection diagnostic enabled (d2 =1) current detection diagnostic defeat (d2 =0) d1 right channel power amplifier working in standard mode (d1 = 0) power amplifier working in high efficiency mode (d1 = 1) d0 left channel power amplifier working in standard mode (d0 = 0) power amplifier working in high efficiency mode (d0 = 1) table 7. ib2 (continued) bit instruction decoding bit table 8. db1 bit instruction decoding bit d7 thermal warning 1 active (d7 = 1) t = 140 c d6 diag. cycle not activated or not terminated (d6 = 0) diag. cycle terminated (d6 = 1) d5 channel ch3 current detection ib2 (d7) = 0 output peak current < 300 ma - open load (d5 = 1) output peak current > 500 ma - normal load (d5 = 0) channel ch3 current detection ib2 (d7) = 1 output peak current < 125 ma - open load (d5 = 1) output peak current > 250 ma - normal load (d5 = 0) d4 channel ch3 turn-on diagnostic (d4 = 0) permanent diagnostic (d4 = 1) d3 channel ch3 normal load (d3 = 0) short load (d3 = 1) d2 channel ch3 turn-on diag.: no open load (d2 = 0) open load detection (d2 = 1) offset diag.: no output offset (d2 = 0) output offset detection (d2 = 1) d1 channel ch3 no short to vcc (d1 = 0) short to vcc (d1 = 1) d0 channel ch3 no short to gnd (d1 = 0) short to gnd (d1 = 1)
TDA7567PD software specifications doc id 16903 rev 1 25/30 table 9. db2 bit instruction decoding bit d7 offset detection not activated (d7 = 0) offset detection activated (d7 = 1) d6 x d5 channel ch4 current detection ib2 (d7) = 0 output peak current < 300 ma - open load (d5 = 1) output peak current > 500 ma - normal load (d5 = 0) channel ch4 current detection ib2 (d7) = 1 output peak current < 125 ma - open load (d5 = 1) output peak current > 250 ma - normal load (d5 = 0) d4 channel ch4 turn-on diagnostic (d4 = 0) permanent diagnostic (d4 = 1) d3 channel ch4 normal load (d3 = 0) short load (d3 = 1) d2 channel ch4 turn-on diag.: no open load (d2 = 0) open load detection (d2 = 1) permanent diag.: no output offset (d2 = 0) output offset detection (d2 = 1) d1 channel ch4 no short to vcc (d1 = 0) short to vcc (d1 = 1) d0 channel ch4 no short to gnd (d1 = 0) short to gnd (d1 = 1) table 10. db3 bit instruction decoding bit d7 standby status (= ib1 - d4) d6 diagnostic status (= ib1 - d6) d5 channel ch1 current detection ib2 (d7) = 0 output peak current < 300 ma - open load (d5 = 1) output peak current > 500 ma - normal load (d5 = 0) channel ch1 current detection ib2 (d7) = 1 output peak current < 125 ma - open load (d5 = 1) output peak current > 250 ma - normal load (d5 = 0) d4 channel ch1 turn-on diagnostic (d4 = 0) permanent diagnostic (d4 = 1) d3 channel ch1 normal load (d3 = 0) short load (d3 = 1)
software specifications TDA7567PD 26/30 doc id 16903 rev 1 d2 channel ch1 turn-on diag.: no open load (d2 = 0) open load detection (d2 = 1) permanent diag.: no output offset (d2 = 0) output offset detection (d2 = 1) d1 channel ch1 no short to vcc (d1 = 0) short to vcc (d1 = 1) d0 channel ch1 no short to gnd (d1 = 0) short to gnd (d1 = 1) table 10. db3 (continued) bit instruction decoding bit table 11. db4 bit instruction decoding bit d7 thermal warning 2 active (d7 =1) t j =133c d6 thermal warning 3 active (d6 =1) t j =118c d5 channel ch2 current detection ib2 (d7) = 0 output peak current < 300 ma - open load (d5 = 1) output peak current > 500 ma - normal load (d5 = 0) channel ch2 current detection ib2 (d7) = 1 output peak current < 125ma - open load (d5 = 1) output peak current > 250 ma - normal load (d5 = 0) d4 channel ch2 turn-on diagnostic (d4 = 0) permanent diagnostic (d4 = 1) d3 channel ch2 normal load (d3 = 0) short load (d3 = 1) d2 channel ch2 turn-on diag.: no open load (d2 = 0) open load detection (d2 = 1) permanent diag.: no output offset (d2 = 0) output offset detection (d2 = 1) d1 channel ch2 no short to vcc (d1 = 0) short to vcc (d1 = 1) d0 channel ch2 no short to gnd (d1 = 0) short to gnd (d1 = 1)
TDA7567PD examples of bytes sequence doc id 16903 rev 1 27/30 10 examples of bytes sequence 1 - turn-on diagnostic - write operation 2 - turn-on diagnostic - read operation the delay from 1 to 2 can be selected by software, starting from 200 ms 3a - turn-on of the power amplifier with 26 db gain, mute on, diagnostic defeat, cd = 2 % . 3b - turn-off of the power amplifier 4 - offset detection procedure enable 5 - offset detection procedure stop and reading operation (the results are valid only for the offset detection bits (d2 of the bytes db1, db2, db3, db4) . the purpose of this test is to check if a d.c. offset (2 v typ.) is present on the outputs, produced by input capacitor with anomalous leakage current or humidity between pins. the delay from 4 to 5 can be selected by software, starting from 30 ms start address byte with d0 = 0 ack ib1 with d6 = 1 ack ib2 ack stop start address byte with d0 = 1 ack db1 ack db2 ack db3 ack db4 ack stop start address byte with d0 = 0 ack ib1 ack ib2 ack stop x0000000 xxx1xx11 start address byte with d0 = 0 ack ib1 ack ib2 ack stop x0xxxxxx xxx0xxxx start address byte with d0 = 0 ack ib1 ack ib2 ack stop xx1xx11x xxx1xxxx start address byte with d0 = 1 ack db1 ack db2 ack db3 ack db4 ack stop
package information TDA7567PD 28/30 doc id 16903 rev 1 11 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. figure 19. powerso36 (slug up) mechanical data and package dimensions outline and mechanical data dim. mm inch min. typ. max. min. typ. max. a 3.270 - 3.410 0.1287 - 0.1343 a2 3.100 - 3.180 0.1220 - 0.1252 a4 0.800 - 1.000 0.0315 - 0.0394 a5 - 0.200 - - 0.0079 - a1 0.030 - -0.040 0.0012 - -0.0016 b 0.220 - 0.380 0.0087 - 0.0150 c 0.230 - 0.320 0.0091 - 0.0126 d 15.800 - 16.000 0.6220 - 0.6299 d1 9.400 - 9.800 0.3701 - 0.3858 d2 - 1.000 - - 0.0394 - e 13.900 - 14.500 0.5472 - 0.5709 e1 10.900 - 11.100 0.4291 - 0.4370 e2 - - 2.900 - - 0.1142 e3 5.800 - 6.200 0.2283 - 0.2441 e4 2.900 - 3.200 0.1142 - 0.1260 e - 0.650 - - 0.0256 - e3 - 11.050 - - 0.4350 - g 0 - 0.075 0 - 0.0031 h 15.500 - 15.900 0.6102 - 0.6260 h - - 1.100 - - 0.0433 l 0.800 - 1.100 0.0315 - 0.0433 n - - 10? - - 10? s - -8?- -8? (1) ?d and e1? do not include mold flash or protusions. mold flash or protusions shall not exceed 0.15mm (0.006?). (2) no intrusion allowed inwards the leads. powerso36 (slug up) 7183931 g
TDA7567PD revision history doc id 16903 rev 1 29/30 12 revision history table 12. document revision history date revision changes 11-dec-2009 1 initial release.
TDA7567PD 30/30 doc id 16903 rev 1 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2009 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com


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